CV
Education

PhD, Electrical Engineering
April 2021 – December 2025

MSc, Electrical and Computer Engineering
July 2018 - March 2021

BSc, Electrical and Computer Engineering
February 2013 - July 2017
Technical Skills
- Hardware Design: FPGA, ASIC, RTL design, digital circuit design.
- Programming: VHDL, Verilog, SystemVerilog, Python, C++, MATLAB, Java
- Tools & Platforms: Vivado, Vitis, Xilinx, ModelSim, Oscilloscope, Git.
Research & Work Experience
- RTL Design Methodology: Designed a hardware-accelerated Ethereum Virtual Machine (EVM) using Verilog and SystemVerilog, focusing on instruction decoding, execution control, and gas accounting.
- FPGA Design Flow: Executed the complete FPGA design flow, including RTL design, simulation, synthesis, and implementation using tools such as Vivado, and TCL-based scripting for automation.
- Simulation & Verification: Verified the EVM using UVM (Universal Verification Methodology) for reusable and scalable test environments. Developed self-checking testbenches for functional validation and testing.
- Scripting & Modeling: Wrote verification and data analysis scripts using Python, MATLAB, and TCL to automate simulation processes, test execution, and waveform processing.
- Clock Domain Crossing (CDC): Designed CDC-safe interfaces to support asynchronous communication within the EVM architecture, ensuring metastability mitigation and reliable data transfer across clock domains.
- Peripheral Interfaces: Integrated and tested communication peripherals including I2C and JTAG to support external debugging, data exchange, and low-level interfacing in the EVM module.
- Timing Closure & Optimization: Applied timing closure techniques to meet high-frequency timing constraints. Performed PPA (Power, Performance, Area) trade-offs to optimize throughput and resource efficiency of the EVM.
- Hardware Design Experience: Contributed to the hardware-level design of the EVM platform, including schematic entry, layout considerations, and signal integrity for high-speed paths within the device.
- Version Control: Utilized Git to manage RTL source files, testbenches, constraint files, and TCL scripts for the hardware EVM project, enabling collaborative development, design traceability, and reproducible builds across multiple iterations.
- RTL Design Methodology: Designed a side-channel-resistant cryptocurrency wallet using RTL best practices, including pipelined datapaths and FSM-based control. Created and optimized flow diagrams using modularization and control/data separation to support scalable hardware development.
- HDL Coding: Implemented the wallet architecture using VHDL, Verilog, and SystemVerilog, following synthesizable coding standards and applying inferred logic, reusable templates, and IP/DSP integration.
- FPGA Design Flow: Carried the design through the full FPGA flow — including RTL simulation, functional analysis, synthesis, and implementation — using Vivado and ModelSim, achieving functional correctness and timing closure.
- Scripting & Automation: Developed custom verification scripts in Python, C++, MATLAB, and TCL to automate simulation, testing, and waveform analysis.
- Testing & Debugging: Validated functionality on Xilinx FPGA boards using Vivado’s Integrated Logic Analyzer (ILA) and created self-checking testbenches for functional and timing verification.
- Hardware Debugging & Validation: Utilized oscilloscopes, probes, and multimeters for real-time testing, debugging, and performance validation.
- Peripheral Interfaces: Integrated and tested standard interfaces including JTAG and UART to communicate with the hardware wallet.
- Analysis & Optimization: Applied Power, Performance, Area (PPA) trade-off techniques to optimize for energy efficiency, clock speed, and FPGA resource utilization on the wallet.
- Secure Hardware Design: Implemented protections against simple power analysis (SPA) and timing-based side-channel attacks (SCA) on the RTL design of the wallet.
- Documentation & Publication: Authored detailed technical documentation, including RTL design specifications and verification reports. Published peer-reviewed journal and conference papers on hardware cryptocurrency wallet architecture and side-channel-resistant design, and contributed to a patent on the wallet’s architecture.
- Collaboration & Specification Compliance: Collaborated with hardware, verification, and cryptography engineers at Quantum eMotion to translate customer requirements into RTL design specifications and deliver a secure, standards-compliant cold wallet architecture.
- Version Control: Employed Git to manage RTL code, simulation testbenches, constraint files, and project documentation for the hardware wallet.
- Secure Communication Design: Developed secure wireless communication protocols using artificial noise injection for enhanced physical layer security.
- System Simulation & Development: Designed and tested communication schemes using MATLAB and Simulink accounting for varied channel conditions.
- Research & Publications: Authored peer-reviewed research on cryptographic security in wireless communications and presented findings at international conferences.
- Procurement & Cost Optimization: Negotiated supplier contracts that reduced electrical project costs by over 20%, contributing to significant operational savings.
- High-Voltage Systems Supervision: Oversaw the installation of high-voltage equipment, improving both safety standards and energy distribution efficiency.
- Training & Documentation: Created technical training manuals and conducted onboarding for staff responsible for operating industrial electrical systems.
- Facility Design: Designed the electrical layout for a warehouse, optimizing lighting distribution, equipment placement, and workflow efficiency.
- Material Sourcing: Identified and procured appropriate electrical components for diverse infrastructure projects, ensuring cost-effectiveness and quality compliance.
- Embedded Systems & Hardware Testing: Configured, tested, and documented microcontroller platforms including NEXYS 3, Raspberry Pi, and Arduino for use in hands-on engineering lab sessions.
- Autonomous Systems Design: Designed and built an autonomous aerial surveillance vehicle equipped with a custom flight control unit, GPS, onboard cameras, and inertial sensors.
- IT Support & Technical Coordination: Delivered IT support services to students and faculty; managed technical operations during orientation, ensuring a seamless onboarding experience for new students.
Projects
- 2020. Research Assistant, Antalya Bilim University, Turkey.
Funded by The Scientific and Technological Research Council of Turkey (TUBITAK).
TÜBİTAK 1001-Novel advanced Non-Orthogonal Multiple Access (NOMA) schemes for enhancing communication security and reliability of future low-complexity massive machine type communication. This project led to numerous published journals and conference papers.
- 2019. Research Assistant, Antalya Bilim University, Turkey.
Funded by The Scientific and Technological Research Council of Turkey (TUBITAK).
TÜBİTAK 1001-Investigation of the interactions between the neuronal noise and the neuronal network using information-theoretical approaches. My role included analyzing data, writing algorithms, and, investing new methodologies. Also, I facilitated the publication of a conference paper on MDPI called Effects of Neuronal Noise on Neural Communication.
Publications
Full List Here
Peer Review Summery
- (7) Multimedia Tools and applications
- (4) IET Wireless Sensor Systems
- (4) International Journal of Parallel Programming
- (2) Computers and Electrical Engineering
- (2) Concurrency and Computation Practice and Experience
- (3) RS Open Journal on Inovative Communication Technologies
Editorial
- RS Open Journal on Inovative Communication Technologies
